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author | Kaz Kylheku <kaz@kylheku.com> | 2022-01-18 21:21:03 -0800 |
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committer | Kaz Kylheku <kaz@kylheku.com> | 2022-01-18 21:21:03 -0800 |
commit | 27898e3aa3c6d7daa784712731aa03a7e6d60b22 (patch) | |
tree | fe9067908c18197d56488c168b15c34eb2dbc07b /tests/common.tl | |
parent | 04b4435e2547295017feca83a2ce4d75e38df2b3 (diff) | |
download | txr-27898e3aa3c6d7daa784712731aa03a7e6d60b22.tar.gz txr-27898e3aa3c6d7daa784712731aa03a7e6d60b22.tar.bz2 txr-27898e3aa3c6d7daa784712731aa03a7e6d60b22.zip |
compiler: few more cases of ifq/ifql removal.
* optimize.tl (basic-blocks peephole-block): Check for the
reversed arguments case of (ifq (d x) (t 0)), and
also match ifq. Add a case for two different d registers
being compared by ifq or ifql which are not both implicated as
load-time regs; that also converts to an unconditional jmp
to the else label. Add a case for a register being compared
with itself with ifq or ifql, which disappears.
Diffstat (limited to 'tests/common.tl')
0 files changed, 0 insertions, 0 deletions