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author | Kaz Kylheku <kaz@kylheku.com> | 2023-04-10 01:29:49 -0700 |
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committer | Kaz Kylheku <kaz@kylheku.com> | 2023-04-10 01:29:49 -0700 |
commit | 2959397edd309c9e64ddf509137619a618d12cf0 (patch) | |
tree | 16fc8bc5cd9d159c93422737154ab2286a0325ab /stdlib/txr-case.txr | |
parent | a6e3a7aabd3563120afdac87d1788e891a359ced (diff) | |
download | txr-2959397edd309c9e64ddf509137619a618d12cf0.tar.gz txr-2959397edd309c9e64ddf509137619a618d12cf0.tar.bz2 txr-2959397edd309c9e64ddf509137619a618d12cf0.zip |
compiler: improve t-reg copy elimination.
* optimize.tl (rename): Instead of a mapping operation,
we perform the substitution only until we hit an
instruction that defines either the src or dst register.
(basic-blocks do-peephole-block): Drop the conditions
for doing the rename: that neither register can be
defined somewhere in the rest of the block. This
restriction is too limiting. We have to be careful now;
we cannot delete the first instruction, and must only
set the recalc flag and add to the rescan list if the
substitution did something, to avoid looping.
Diffstat (limited to 'stdlib/txr-case.txr')
0 files changed, 0 insertions, 0 deletions