From 3508483456416a42f26bffec9c02cdad47e18765 Mon Sep 17 00:00:00 2001 From: Kaz Kylheku Date: Sun, 16 Apr 2023 23:30:27 -0700 Subject: compiler: allow v reg source in t-reg optimization This change is now possible due to the previous bugfix. * stdlib/optimize.tl (basic-blocks rename): If the source register is a v-reg, do not allow the propagation past an end instruction. This is a precaution because the end instruction could be the end of the frame in which the v-register is valid; we don't want to propagate it outside of that frame. --- stdlib/optimize.tl | 28 +++++++++++++++------------- 1 file changed, 15 insertions(+), 13 deletions(-) (limited to 'stdlib') diff --git a/stdlib/optimize.tl b/stdlib/optimize.tl index 089b1334..bb1b84c3 100644 --- a/stdlib/optimize.tl +++ b/stdlib/optimize.tl @@ -362,17 +362,20 @@ (defmeth basic-blocks rename (bb insns dst src) (build - (whilet ((insn (pop insns))) - (let ((close (if-match (close . @nil) insn t)) - (li [bb.li-hash insn])) - (cond - (close (add insn)) - ((or (mequal li.def0 dst src) - (mequal li.def1 dst src)) - (add insn) - (pend insns) - (set insns nil)) - (t (add (subst-preserve dst src bb li insn)))))))) + (let ((vreg (eq (car src) 'v))) + (whilet ((insn (pop insns))) + (let ((end (if-match (end . @nil) insn t)) + (close (if-match (close . @nil) insn t)) + (li [bb.li-hash insn])) + (cond + (close (add insn)) + ((or (and vreg end) + (mequal li.def0 dst src) + (mequal li.def1 dst src)) + (add insn) + (pend insns) + (set insns nil)) + (t (add (subst-preserve dst src bb li insn))))))))) (defmeth basic-blocks peephole-block (bb bl) (let ((code bb.(do-peephole-block bl bl.insns))) @@ -407,8 +410,7 @@ ;; unnecessary copying t-reg (@(require ((mov @(as dst (t @n)) @src) . @rest) (only-locally-used-treg (car insns) n) - (nequal dst src) - (neq (car src) 'v)) + (nequal dst src)) (let ((ren bb.(rename rest dst src))) (cond ((nequal rest ren) -- cgit v1.2.3