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* Fix elf-nano.specs to work without -save-tempsThomas Preud'homme2017-02-151-3/+3
| | | | | | | | | | | | The changes in af272aca591fe1dc0f1be64ae5bda147ea98a047 only works when using gcc/g++ with -E or -save-temps, otherwise newlib's newlib.h gets used even if -specs=nano.specs is specified. This is because the driver only use cpp_options spec for the external cpp tool, not for the integrated one. This patch uses instead cpp_unique_options which is used in all cases: it is used directly when the integrated preprocessor is used, and indirectly by expansion of cpp_options otherwise.
* Fix cpp invocation for C++ in nano specThomas Preudhomme2017-02-131-3/+3
| | | | | | | | | | | Hi, The changes in c028685518a261f6d0dab0d7ed15f9570ab9b3d0 to use newlib-nano's include directory work for cc1 but not cc1plus. cc1plus comes with its own cpp spec which does not have a name attached to it. This patch uses the renaming trick on cpp_options instead of cpp, as cpp_options is used both by cc1 and cc1plus.
* libgloss: Remove duplicate definition of environStafford Horne2017-02-131-3/+0
| | | | | | | | | | | | | | | | Environ is defined in libgloss and libc: - libgloss/or1k/syscalls.c - libc/stdlib/environ.c When linking we sometimes get errors: or1k-elf-g++ test.o -mnewlib -mboard=or1ksim -lm -o test /opt/shorne/software/or1k/lib/gcc/or1k-elf/5.3.0/../../../../or1k-elf/lib/libor1k.a(syscalls.o):(.data+0x0): multiple definition of `environ' /opt/shorne/software/or1k/lib/gcc/or1k-elf/5.3.0/../../../../or1k-elf/lib/libc.a(lib_a-environ.o):(.data+0x0): first defined here collect2: error: ld returned 1 exit status This doesnt happen after the fix. Basic things build fine too.
* libgloss: or1k: If available call the init for init_arrayStafford Horne2017-02-131-0/+6
| | | | | | | | | There was an issue revealed in gdb testing where C++ virtual tables were not getting properly initialized. This seems to be due to the c++ global constructors moving from ctors to init_array. This fix makes sure we call the proper method for initializing the constructors in all places.
* or1k: Make open reentrantOlof Kindgren2017-02-131-1/+1
| | | | | | | | | | | or1k uses reentrant calls by default, but there was no open_r defined which caused failure in C++/C code such as: int main() { std::cout << "test\n"; return 0; } or int main() {open(".", 0);}
* Committed, libgloss: hook up cris-elf to the initfini-array support.Hans-Peter Nilsson2017-01-292-2/+15
| | | | | | | | | | | | | | | | | | After a binutils change "a while ago" (2015-12) to default to --enable-initfini-array, i.e. to merge .ctors and .dtors into .init_array and .fini_array, this is needed for cdtors to run at all. Based on what goes on in arm/ and aarch64/. Tested for cris-elf by running the gcc testsuite. By the way, the configure test doesn't detect this change, so the HAVE_INITFINI_ARRAY ifdeffery is somewhat redundant. Still, the change is tested to be safe with older binutils too. libgloss/ * cris/crt0.S, cris/lcrt0.c: Include newlib.h. [HAVE_INITFINI_ARRAY] (_init): Define to __libc_init_array. [HAVE_INITFINI_ARRAY] (_fini): Ditto __libc_fini_array.
* Fix html build with makeinfo 5.2Thomas Preudhomme2016-08-191-2/+2
| | | | | | | | | | | HTML build fails with makeinfo 5.2 with the following error: libgloss/doc/porting.texi:73: @menu seen before first @node libgloss/doc/porting.texi:73: perhaps your @top node should be wrapped in @ifnottex rather than @ifinfo? Following the advice indeed solve the issue while still allowing pdf, dvi and info builds to work.
* arc: Add align keyword.Claudiu Zissulescu2016-08-111-2/+2
| | | | | | | libgloss/ 2016-06-28 Claudiu Zissulescu <claziss@synopsys.com> * arc/crt0.S: Add align keyword.
* Add comment in the v850's crt0.S file noting that separate LMA and VMA ↵newlib-snapshot-20160527Nick Clifton2016-05-261-0/+9
| | | | addresses for data sections are not currently supported.
* arc: Have nops in _exit_halt only for ARCompactAnton Kolesov2016-05-251-6/+9
| | | | | | | | | | | ARCompact processors (ARC 600 and ARC 700) require three "nop"s after the "flag 1" instruction. Later ARC processors do not have this requirement, so it is possible to reduce size of "_exit_halt" for them. libgloss/ 2016-05-24 Anton Kolesov <Anton.Kolesov@synopsys.com> * arc/crt0.S (_exit_halt): Insert nops only for ARCompact.
* arc: Rework default exception handlers for ARC EM and HSAnton Kolesov2016-05-251-73/+34
| | | | | | | | | | | | | | | | | | | | | | Initially crt0.S used a special function, declared as weak as a default exception handler in interrupt vector table. To let user override individual handlers, this function had multiple names - one for each IVT entry, which, however, was terribly confusing for the debugger and user - because it wasn't clear which symbol will be used as a function name in debugger. Defining multiple separate functions - one for each handler, would resolve the mess, but would increase code size of crt0.o. To clean this up, this patch defines exception handlers as weak symbols as well, but those are defined as just symbols, not functions, hence there would be less confusion over what is what. At the same time, users still can redefine exception handlers symbol by creating functions with respective names. libgloss/ 2016-05-24 Anton Kolesov <Anton.Kolesov@synopsys.com> * arc/crt0.S: Convert memory_error and friends to non-function symbols.
* libgloss/ft32: fix whitespace in MakefileYaakov Selkowitz2016-05-201-29/+29
| | | | Signed-off-by: Yaakov Selkowitz <yselkowi@redhat.com>
* Fix libgloss arc nsim specs file.Jeff Johnston2016-05-111-1/+1
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* Fix libgloss/arc/nano.specs file.Jeff Johnston2016-05-061-2/+2
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* Fix white-space in libgloss/arc/Makefile.in.Jeff Johnston2016-05-051-3/+3
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* Fix support ARC processors without barrel-shifterJeff Johnston2016-05-021-1/+6
| | | | | | | | | | | | | | | | | crt0.S for ARC used to use instruction "asr.f lp_count, r3, 2" for all cores except ARC601. However instructions which shift more than 1 bit are optional, so this crt0.S didn't worked for all ARC cores. Luckily this is a shift just by 2 bits on all occassions, so fix is trivial - use two single-bit shifts. libgloss/ChangeLog 2016-04-29 Anton Kolesov <anton.kolesov@synopsys.com> * arc/crt0.S: Fix support for processors without barrel-shifter. Signed-off-by: Anton Kolesov <Anton.Kolesov@synopsys.com>
* Update crt0.S for ARC.Jeff Johnston2016-05-021-9/+23
| | | | | | | | | | | | | | | | | | | | | | | | | This is similar to commit 06537f05d4b6a0d2db01c6afda1d2a0ea2588126 to the newlib for ARC. GCC for ARC has been updated to provide consistent naming of preprocessor definitions for different optional architecture features: * __ARC_BARREL_SHIFTER__ instead of __Xbarrel_shifter for -mbarrel-shifter * __ARCEM__ instead of __EM__ for ARC EM cores * __ARCHS__ instead of __HS__ for ARC HS cores * etc (not used in libgloss) This patch updates crt0.S for ARC to use new definitions instead of a deprecated ones. To ensure compatibility with older compiler new definitions are also defined in crt0.S if needed, based on presence of deprecated preprocessor definitions. libgloss/ChangeLog 2016-04-29 Anton Kolesov <Anton.Kolesov@synopsys.com> * arc/crt0.S: Use new GCC defines to detect processor features.
* Add necessary infrastructure to support "nano" build of newlib.Jeff Johnston2016-04-293-3/+35
| | | | | | | | | | ARC aproach to this feature is similiar to ARM's one here. 2016-04-29 Anton Kolesov <anton.kolesov@synopsys.com> * arc/nano.specs: New file. * arc/Makefile.in: Support nano.specs. * arc/nsim.specs: Likewise.
* Fixed semihosting for ARM when heapinfo not provided by debugger.David Hoover2016-04-211-1/+3
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* Fix typo in the name of the MSP430 attribute section of example MSP430 ↵Nick Clifton2016-04-072-2/+2
| | | | linker scripts.
* Initializing TTBR0 to inner/outer WBJiong Wang2016-03-261-1/+10
| | | | | | | | | | | | | | | | | | | | | While running tests on internal systems, we identified an issue in the startup code for newlib on AArch32 systems with Multiprocessor Extensions to the architecture. The issue is we were configuring page table flags to be Inner cacheable/Outer non-cacheable, while for at least architectures with Multiprocessor Extension, we'd configure it to Inner/Outer write-back, no write-allocate, and cacheable. The attached patch fixes this, and no regression on arm-none-eabi bare-metal tests. Adopted suggestion given by Richard offline to avoid using jump. libgloss/ * arm/cpu-init/rdimon-aem.S: Set TTBR0 to inner/outer cacheable WB, and no allocate on WB for arch with multiprocessor extension.
* or1k: properly restore timerStefan Roesch2016-03-131-1/+1
| | | | Consider the function parameter for restoring the timer
* or1k: Fix multicore stack calculationStefan Roesch2016-03-132-14/+14
| | | | | | | Change the type of the stack pointers to enable pointer calculations at byte granularity, which is needed for the calculation of _or1k_stack_core[c] and _or1k_exception_stack_core[c] with _or1k_stack_size and _or1k_exception_stack_size. (util.c:53-54)
* Remove bogus LONG(0) directives from MSP430 linker scripts.Nick Clifton2016-03-102-2/+0
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* Seperate MSP430 cio syscalls into individual function sections.Nick Clifton2016-02-091-29/+46
| | | | | | START_FUNC: New macro. END_FUNC: New macro. exit, isatty, getpid, sc2: Use the new macros.
* Make macro checks ARMv8-M baseline proofThomas Preud'homme2016-01-287-33/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | libgloss: * arm/Makefile.in: Add newlib/libc/machine/arm to the include path if newlib is present. * arm/arm.h: Include acle-compat.h. (THUMB_V7_V6M): Rename to ... (PREFER_THUMB): This. Use ACLE macros __ARM_ARCH_ISA_ARM instead of __ARM_ARCH_6M__ to decide whether to define it. (THUMB1_ONLY): Define for Thumb-1 only targets. (THUMB_V7M_V6M): Rename to ... (THUMB_VXM): This. Defined based on __ARM_ARCH_ISA_ARM, excluding ARMv7. * arm/crt0.S: Use THUMB1_ONLY rather than __ARM_ARCH_6M__, !__ARM_ARCH_ISA_ARM rather than THUMB_V7M_V6M for fp enabling, and PREFER_THUMB rather than THUMB_V7_V6M. Rename other occurences of THUMB_V7M_V6M to THUMB_VXM. * arm/linux-crt0.c: Likewise. * arm/redboot-crt0.S: Likewise. * arm/swi.h: Likewise. * arm/trap.S: Likewise. newlib: * libc/machine/arm/memcpy-stub.c: Use ACLE macros __ARM_ARCH_ISA_THUMB and __ARM_ARCH_ISA_ARM to check for Thumb-2 only targets rather than __ARM_ARCH and __ARM_ARCH_PROFILE. * libc/machine/arm/memcpy.S: Likewise. * libc/machine/arm/setjmp.S: Likewise for Thumb-1 only target and include acle-compat.h. * libc/machine/arm/strcmp.S: Likewise for Thumb-1 and Thumb-2 only target and include acle-compat.h. * libc/sys/arm/arm.h: Include acle-compat.h. (THUMB_V7_V6M): Rename to ... (PREFER_THUMB): This. Use ACLE macro __ARM_ARCH_ISA_ARM instead of __ARM_ARCH_6M__ to decide whether to define it. (THUMB1_ONLY): Define for Thumb-1 only targets. (THUMB_V7M_V6M): Rename to ... (THUMB_VXM): This. Defined based on __ARM_ARCH_ISA_ARM, excluding ARMv7. * libc/sys/arm/crt0.S: Use PREFER_THUMB rather than THUMB_V7_V6M and rename THUMB_V7M_V6M into THUMB_VXM. * libc/sys/arm/swi.h: Likewise.
* Deprecate newlib and winsup ChangeLog filesCorinna Vinschen2016-01-282-7119/+7120
| | | | Signed-off-by: Corinna Vinschen <corinna@vinschen.de>
* Build msp430-specific libnosysDJ Delorie2015-12-174-6/+12
| | | | | | | | | | The MSP430 debuggers support I/O on hardware through CIO, so we can use a CIO-enabled library as the "nosys" library (in addition to the libsim library, which talks to our simulator) * configure.in: Don't build default libnosys for msp430 * configure: Regenerate. * msp430/Makefile: Rename libcio to libnosys.
* Update CIO hooks to be more flexible.DJ Delorie2015-12-172-9/+21
| | | | | | | Replace the one hook we had with two to avoid underscore issues. * msp430/cio.c: Remove, replace with... * msp430/cio.S: New, this.
* rl78: Don't output CR when LF is encountered in write().Kevin Buettner2015-12-162-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The file libgloss/rl78/write.c currently contains code which outputs \r when \n is seen. The code will then output the \n as well. This patch removes the bit of code that tests for \n and then outputs \r. I made this change to fix some failures in gdb.base/call-ar-st.exp. In that test, I see two carriage returns followed by a newline. One CR is output by the libgloss code. The other is output by the terminal driver. The total list of failures fixed (using the default rl78 multilib) are: FAIL: gdb.base/call-ar-st.exp: print print_double_array(double_array) (timeout) FAIL: gdb.base/call-ar-st.exp: print print_char_array(char_array) (timeout) FAIL: gdb.base/call-ar-st.exp: continue to tbreak2 (timeout) FAIL: gdb.base/call-ar-st.exp: continuing to tbreak3 (timeout) FAIL: gdb.base/call-ar-st.exp: print print_double_array(array_d) (timeout) FAIL: gdb.base/call-ar-st.exp: continuing to tbreak4 (timeout) FAIL: gdb.base/call-ar-st.exp: print sum_array_print(10, *list1, *list2, *list3, *list4) (timeout) FAIL: gdb.base/call-ar-st.exp: print print_small_structs (timeout) FAIL: gdb.base/call-ar-st.exp: print print_ten_doubles(123.456, 123.456, -0.12, -1.23, 343434.8, 89.098, 3.14, -5678.12345, -0.11111111, 216.97065) (timeout) FAIL: gdb.base/call-ar-st.exp: print print_small_structs from print_long_arg_list (timeout) FAIL: gdb.base/call-ar-st.exp: print print_struct_rep(*struct1, *struct2, *struct3) (timeout) FAIL: gdb.base/dprintf.exp: call: printf: 1st dprintf (timeout) FAIL: gdb.base/dprintf.exp: call: printf: 2nd dprintf (timeout) FAIL: gdb.base/interrupt.exp: process is alive (the program exited) There are no regressions. libgloss/ChangeLog: * rl78/write.c (_write): Don't output CR when LF is encountered.
* Always define __high_bsssize, do not just PROVIDE it.Nick Clifton2015-12-042-2/+6
| | | | * msp430/msp430xl-sim.ld (__high_bsssize): Define.
* Fix initialisation of .upper.bss for the MSP430.Nick Clifton2015-11-232-0/+5
| | | | * msp430/msp430xl-sim.ld (__high_bsssize): Define.
* Add support for ARC to libglossAnton Kolesov2015-11-1213-0/+5563
| | | | | | | | | | | | | | | | | | | | | | | | ChangeLog: 2015-11-12 Anton Kolesov <Anton.Kolesov@synopsys.com> * configure.in: Add ARC support to libgloss. * configure: Regenerate. libgloss/ChangeLog: 2015-11-12 Anton Kolesov <Anton.Kolesov@synopsys.com> * configure: Add ARC support. * configure.in: Likewise. * arc/Makefile.in: Likewise. * arc/aclocal.m4: Likewise. * arc/configure: Likewise. * arc/configure.in: Likewise. * arc/crt0.S: Likewise. * arc/libcfunc.c: Likewise. * arc/nsim-syscall.h: Likewise. * arc/nsim-syscalls.c: Likewise. * arc/nsim.specs: Likewise. * arc/sbrk.c: Likewise.
* * rl78/crt0.S (_start): Fixed code that clears .bssDJ Delorie2015-10-202-10/+16
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* Add support for persistent data to the MSP430 linker scripts.Nick Clifton2015-10-064-8/+53
| | | | | | | * msp430/msp430-sim.ld: Add .persistent section. Tidy up section layout. Start RAM above hardware multiply registers. * msp430/msp430xl-sim.ld: Likewise.
* Add support for FT32 platform.Jeff Johnston2015-09-0424-0/+5285
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* oops - forgot to add PR number to ChangeLog entry.Nick Clifton2015-08-241-0/+1
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* * msp430/crt0.S: Remove watchdog disabling code.Nick Clifton2015-08-202-2/+4
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* or1k: Typo fixesJeff Johnston2015-08-073-2/+7
| | | | | | | Wrong paranthesis and an incorrect symbol name are fixed. * or1k/boards/optimsoc.S: Fix symbol name * or1k/crt0.S: Remove paranthesis
* or1k: Allow exception nestingJeff Johnston2015-08-074-39/+149
| | | | | | | | | | | | | | | | | | | Allow exceptions to be nested, which is especially useful with urgent interrupts while processing an exception. The implementation counts up the nesting level with each call to an exception. In the outer exception (level 1), the exception stack is started. All nested exceptions just reserve the redzone (scratch memory that may be used by compiler) and exception context on the stack, but then process on the same scratch. Restriction: Impure pointers are shared among all exceptions. This may be solved by creating an impure data structure in the stack frame with each nested exception. * or1k/crt0.S: Add exception nesting * or1k/exceptions-asm.S: ditto * or1k/util.c: ditto
* or1k: Make heap end globally visibleJeff Johnston2015-08-072-1/+5
| | | | | | Boards may change the initial value from _end to another value. * or1k/sbrk.c: Make heap end globally visible
* This is part of a larger fix for RL78 complex relocs - they need an absolute ↵Nick Clifton2015-08-043-0/+9
| | | | | | | symbol at address 0 that is not part of the *ABS* section. * rl78/rl78-sim.ld: Provide a value for __rl78_abs__. * rl78/rl78.ld: Likewise.
* Change to nano.specs to add nano's include dircygwin-2_1_0-releaseAndre Simoes Dias Vieira2015-07-142-0/+9
| | | | Signed-off-by: Corinna Vinschen <corinna@vinschen.de>
* or1k: Add missing initialization of impure ptrJeff Johnston2015-05-272-0/+7
| | | | * or1k/impure.c: Fix initialization of impure ptr
* or1k: set heap start for optimsoc-gzllJeff Johnston2015-05-272-0/+33
| | | | | | | | | | | | | | | | | | | - With the gzll kernel we have two different loading options: - If the image is loaded to the global memory, the bootstrapping loads the kernel to local memory. Applications are loaded on demand. The heap then starts right after bss. - If the image is pre-loaded to the local memory it includes the application binaries right after bss. The heap then starts after the application objects. - We can check if this is a gzll kernel as it has the string "gzll" at 0x2000. At 0x200c we then find the end of the application objects in the image. If there is no global memory we set _or1k_heap_start to this value. * or1k/boards/optimsoc.S: Heap for gzll kernel
* or1k: Make heap start configurableJeff Johnston2015-05-272-2/+7
| | | | | | | | | - Previously the heap started right after the bss section. This can now be configured by changing the _or1k_heap_start symbol that defaults to the old value (&end). In board_init_early, we can now set this to another value. * or1k/sbrk.c: Allow for different heap start
* or1k: UART also accept timeout interruptJeff Johnston2015-05-272-3/+9
| | | | | | | - The UART interrupt only handled receiver FIFO full interrupts, but we also want to handle timeout interrupts. * or1k/or1k_uart.c: Fix interrupts
* Bug fix in timer for or1kJeff Johnston2015-05-272-1/+5
| | | | | | - Properly set the interrupt pending flag in the timer mode register. * or1k/timer.c: Properly set interrupt flags
* Store entire context for or1kJeff Johnston2015-05-272-0/+14
| | | | | | | | - Store the exception program counter (from EPCR) and exception status register (from ESR) also during the exception. A runtime system may replace them thereby to implement a thread switch. * or1k/exception-asm.S: Store missing state
* Fix exception stack frame for or1kJeff Johnston2015-05-273-3/+8
| | | | | | | | | - We do not need a red zone here, as we do not operate on the current stack, but always use the clear exception stack. Also reserve two extra words for the context to store EPCR and ESR. * or1k/crt0.S: Fix exception stack frame * or1k/exception-asm.S: ditto
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