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* Fix swapgs instruction.Alan Modra2001-01-242-3/+7
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* Adds assembly and dis-assembly support for the HPPA wideAlan Modra2001-01-142-21/+35
| | | | mode, 16 bit forms of ldi, ldo, ldw and stw instructions.
* * i386.c (md_assemble): Check cpu_flags even for nullary instructions.Jan Hubicka2001-01-132-3/+9
| | | | | | | * i386.h (i386_optab): Fix pusha and ret templates. * i386-dis.c (dis386_att, disx86_64_att): Fix ret, lret and iret templates.
* Updated ARC assembler from arccores.comNick Clifton2001-01-117-117/+180
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* * i386.h (pinsrw): Add.Jan Hubicka2001-01-102-4/+12
| | | | | | | (pshufw): Remove. (cvttpd2dq): Fix operands. (cvttps2dq): Likewise. (movq2q): Rename to movdq2q.
* Fix "movnti"Alan Modra2001-01-102-6/+10
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* Update address for bug reports.Phil Blundell2001-01-092-1/+5
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* 2001-01-09 Jeff Johnston <jjohnstn@redhat.com>Jeff Johnston2001-01-092-3/+15
| | | | | | | * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number of operands (unsigned char or unsigned short). (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE. (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
* * tc-i386.c (md_assemble): Handle third byte of the opcode as prefix.Jan Hubicka2001-01-052-5/+9
| | | | * i386.h (i386_optab): Make [sml]fence template to use immext field.
* * tc-i386.h (CpuK6, CpuAthlon, CpuSledgehammer, CpuMMX, Cpu3dnow,Jan Hubicka2001-01-032-4/+173
| | | | | | | | | CpuUnknown): Renumber (CpuP4, CpuSSE2): New. (CpuUnknownFlags): Add CpuP4 and CpuSSE2 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions introduced by Pentium4
* * configure.in: Add support for x86_64 and x86_64-*-linux-gnu*Jan Hubicka2000-12-302-272/+452
| | | | | | | | | | | | | * NEWS: Add x86_64. * i386.h (i386_optab): Add "rex*" instructions; add swapgs; disable jmp/call far direct instructions for 64bit mode; add syscall and sysret; disable registers for 0xc6 template. Add 'q' suffixes to extendable instructions, disable obsoletted instructions, add new sign/zero extension ones. (i386_regtab): Add extended registers. (*Suf): Add No_qSuf. (q_Suf, wlq_Suf, bwlq_Suf): New.
* * tc-i386.h (i386_target_format): Define even for ELFs.Jan Hubicka2000-12-202-107/+112
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | (QWORD_MNEM_SUFFIX): New macro. (CpuK6,CpuAthlon,CpuSledgehammer, Cpu64, CpuNo64, CpuUnknownFlags): New macros (CpuMMX,CpuSSE,Cpu3dnow, CpuUnknown): Renumber. (IgnoreSize, DefaultSize, No_?Suf, FWait, IsString, regKludge, IsPrefix, ImmExt): Renumber. (Size64, No_qSuf, NoRex64, Rex64): New macros. (Reg64, Imm32S, Imm64, Disp32S, Disp64): New macros. (Imm8, Imm8S, Imm16, Imm32, Imm1, BaseIndex, Disp8, Disp16, Disp32, InOutPortReg,ShiftCount, Control, Debug, Test, FloatReg, FloatAcc, SReg2, SReg3, Acc, JumpAbsolute, RegMMX, RegXMM, EsSeg, InvMem): Renumber. (Reg, WordReg): Add Reg64. (Imm): Add Imm32S and Imm64. (EncImm): New. (Disp): Add Disp64 and Disp32S. (AnyMem): Add Disp32S. (RegRex, RegRex64): New macros. (rex_byte): New type. * tc-i386.c (set_16bit_code_flag): Kill. (fits_in_unsigned_long, fits_in_signed_long): New functions. (reloc): New parameter "signed"; support x86_64. (set_code_flag): New. (DEFAULT_ARCH): New macro; default to "i386". (default_arch): New static variable. (struct _i386_insn): New fields Operand_PCrel; rex. (flag_16bit_code): Kill; All tests replaced to "flag_code == CODE_64BIT"; (flag_code): New enum and static variable. (use_rela_relocations): New static variable. (flag_code_names): New static variable. (cpu_arch_flags): Default to CpuUnknownFlags|CpuNo64. (cpu_arch): Add "sledgehammer"; Add CPUAthlon to Athlon and CpuK6 to K6 and Athlon. (i386_align_code): Return plain "nop" for x86_64. (mode_from_disp_size): Support Disp32S. (smallest_imm_type): Support Imm32S and Imm64. (offset_in_range): Support size of 8. (set_cpu_arch): Do not clobber to Cpu64/CpuNo64. (md_pseudo_table): Add "code64"; use set_code_flat. (md_begin): Emit sane error message on hash failure. (tc_i386_fix_adjustable): Support x86_64 relocations. (md_assemble): Support QWORD_MNEM_SUFFIX, REX registers, instructions supported on particular arch just partially, output of 64bit immediates, handling of Imm32S and Disp32S type. (i386_immedaite): Support x86_64 relocations; support 64bit constants. (i386_displacement): Likewise. (i386_index_check): Cleanup; support 64bit addresses. (md_apply_fix3): Support x86_64 relocation and rela. (md_longopts): Add "32" and "64". (md_parse_option): Add OPTION_32 and OPTION_64. (i386_target_format): Call even for ELFs; choose between elf64-x86-64 and elf32-i386. (i386_validate_fix): Refuse GOTOFF in 64bit mode. (tc_gen_reloc): Support rela relocations and x86_64. (intel_e09_1): Support QWORD. * i386.h (i386_optab): Replace "Imm" with "EncImm". (i386_regtab): Add flags field.
* * COPYING: Update to currentDJ Delorie2000-12-192-3/+9
| | | | | ftp://ftp.gnu.org/pub/gnu/Licenses/COPYING-2.0 (fixes references to 19yy as example year in copyright notice).
* * dis-asm.h (struct disassemble_info): New member "section".Hans-Peter Nilsson2000-12-182-0/+13
| | | | | (INIT_DISASSEMBLE_INFO_NO_ARCH): Initialize private_data member. Initialize section member.
* fix formattingDJ Delorie2000-12-171-4/+4
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* * safe-ctype.h: Make code work on all targets and not just onDJ Delorie2000-12-172-8/+8
| | | | targets where a char is 8 bits.
* Add link option to allow undefiedn symbols in shared librariesNick Clifton2000-12-122-0/+20
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* Fix Formatting.Nick Clifton2000-12-124-7/+14
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* * hppa.h (DT_HP_*): Define relative to OLD_DT_LOOS for hpuxJeff Law2000-12-112-13/+21
| | | | compatibility.
* * tc-i386.c (md_assemble): Refuse 's' and 'l' suffixes in the intelJan Hubicka2000-12-111-76/+60
| | | | | | | | | | | | | | mode; convert 'd' suffix to 's' or 'l'; remove all DWORD_MNEM_SUFFIX references. (intel_e09_1): Convert QWORD to 'l' suffix for FP operations; refuse otherwise. * tc-i386.h (DWORD_MNEM_SUFFIX): Kill. (No_dSuf): Kill. * i386.h (*_Suf): Remove No_dSuf. (d_suf, wld_Suf,sld_Suf, sldx_Suf, bwld_Suf, d_FP, sld_FP, sldx_FP) Remove. (i386_optab): Remove 'd' in the suffixes.
* Replace #warning with #errorAlan Modra2000-12-112-2/+6
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* Actually add safe-ctype.hChristopher Faylor2000-12-081-0/+105
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* * safe-ctype.h: New file.Christopher Faylor2000-12-081-0/+4
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* #warn -> #warningAlan Modra2000-12-072-1/+5
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* * getopt.h obstack.h: Standarize copyright statement.DJ Delorie2000-12-073-2/+8
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* * demangle.h: Change "new_abi" to "v3" everywhere.DJ Delorie2000-12-052-7/+11
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* Add MIPS SB1 machineNick Clifton2000-12-024-2/+8
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* Add MIPS V and MIPS 64 machine numbersNick Clifton2000-12-024-0/+16
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* Add MIPS32 as a seperate MIPS architectureNick Clifton2000-12-014-253/+278
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* Improve MIPS32 supportNick Clifton2000-12-012-20/+35
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* Add x86-64 support files.Nick Clifton2000-11-303-0/+52
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* * libiberty.h: Move #includes to top. Prototype xmalloc_failed.DJ Delorie2000-11-292-6/+14
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* * common.h (e_machine numbers): Clarify comments to describe howHans-Peter Nilsson2000-11-272-6/+20
| | | | | | | EM_* constants are assigned. Move EM_PJ from official section to ad-hoc section. (EM_CRIS): Correct comment to match official description. (EM_MMIX): Ditto.
* Add new ELF ABI definesNick Clifton2000-11-222-31/+61
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* 2000-11-20 H.J. Lu <hjl@gnu.org>H.J. Lu2000-11-202-1/+6
| | | | | * common.h (ELFOSABI_MONTEREY): Renamed to ... (ELFOSABI_AIX): This.
* Update relocations per August psABI docs.Richard Henderson2000-11-162-60/+81
| | | | | | | | | * ia64.h (R_IA64_SEGBASE): Remove. (R_IA64_LTV*): Renumber to 0x74 to 0x77. (R_IA64_EPLTMSB, R_IA64_EPLTLSB): Remove. (R_IA64_TPREL14, R_IA64_TPREL64I): New. (R_IA64_DTPMOD*): New. (R_IA64_DTPREL*): New.
* Correct date and style of last entryHans-Peter Nilsson2000-11-151-1/+1
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* * demangle.h: Add gnat and java demangle styles.Hans-Peter Nilsson2000-11-152-2/+13
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* * hashtab.h (struct htab): Add member return_allocation_failure.Hans-Peter Nilsson2000-11-042-0/+16
| | | | | (htab_try_create): New prototype. Mention which functions may return NULL when this is used.
* * hashtab.h: Change void * to PTR where necessary.Hans-Peter Nilsson2000-11-032-5/+9
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* gas/Jakub Jelinek2000-10-202-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * config/tc-sparc.c (sparc_ip): Fix a bug which caused v9_arg_p instructions to loose any special insn->architecture mask. * config/tc-sparc.c (v9a_asr_table): Add v9b ASRs. (sparc_md_end, sparc_arch_types, sparc_arch, sparc_elf_final_processing): Handle v8plusb and v9b architectures. (sparc_ip): Handle siam mode operands. Support v9b ASRs (and request v9b architecture if they are used). bfd/ * elf32-sparc.c (elf32_sparc_merge_private_bfd_data, elf32_sparc_object_p, elf32_sparc_final_write_processing): Support v8plusb. * elf64-sparc.c (sparc64_elf_merge_private_bfd_data, sparc64_elf_object_p): Support v9b. * archures.c: Declare v8plusb and v9b machines. * bfd-in2.h: Ditto. * cpu-sparc.c: Ditto. include/opcode/ * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B. Note that '3' is used for siam operand. opcodes/ * sparc-dis.c (v9a_asr_reg_names): Add v9b ASRs. (compute_arch_mask): Add v8plusb and v9b machines. (print_insn_sparc): siam mode decoding, accept ASRs up to 25. * opcodes/sparc-opc.c: Support for Cheetah instruction set. (prefetch_table): Add #invalidate.
* merge from gcc repositoryDJ Delorie2000-10-122-1/+11
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* Correct date of checkinHans-Peter Nilsson2000-09-291-1/+1
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* * dis-asm.h: Declare cris_get_disassembler, not print_insn_cris.Hans-Peter Nilsson2000-09-292-2/+7
| | | | Fix typo in comment.
* * cris.h (EF_CRIS_UNDERSCORE): New.Hans-Peter Nilsson2000-09-292-0/+7
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* Add alloca-conf.h from libiberty.Alan Modra2000-09-282-0/+28
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* .plt stub for lazy linking, --stub-group-size=N ld switch,Alan Modra2000-09-272-0/+7
| | | | import stub fix, extra DIR14F reloc to fix abort in tc_gen_reloc
* Fix ia64 gas testsuite. Update ia64 DV tables. Fix ia64 gas testsuite again.Jim Wilson2000-09-222-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | gas/ChangeLog * config/tc-ia64.c (dv_sem): Add "stop". (specify_resource, case IA64_RS_PR): Only handles regs 1 to 15 now. (specify_resource, case IA64_RS_PRr): New for regs 16 to 62. (specify_resource, case IA64_RS_PR63): Reorder (note == 7) test to match above. (mark_resources): Check IA64_RS_PRr. gas/testsuite/ChangeLog * gas/ia64/dv-raw-err.s: Add new testcases for PR%, 16 - 62. * gas/ia64/dv-waw-err.s: Likewise. * gas/ia64/dv-imply.d: Regenerate. * gas/ia64/dv-mutex.d, gas/ia64/dv-raw-err.l, gas/ia64/dv-safe.d, gas/ia64/dv-srlz.d, gas/ia64/dv-war-err.l, gas/ia64/dv-waw-err.l, gas/ia64/opc-f.d, gas/ia64/opc-i.d, gas/ia64/opc-m.d: Likewise. include/opcode/ChangeLog * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP. opcodes/ChangeLog * ia64-dis.c (print_insn_ia64): Revert Aug 7 byte skip count change. * ia64-gen.c (parse_semantics): Handle IA64_DVS_STOP. (lookup_specifier): Handle "PR%, 1 to 15" and "PR%, 16 to 62". * ia64-ic.tbl, ia64-raw.tbl, ia64-war.tbl, ia64-waw.tbl: Update. * ia64-asmtab.c: Regnerate.
* * sh.h (R_SH_GOT32, R_SH_PLT32, R_SH_COPY, R_SH_GLOB_DAT,Alexandre Oliva2000-09-142-9/+20
| | | | | | | | R_SH_JMP_SLOT, R_SH_RELATIVE, R_SH_GOTOFF, R_SH_GOTPC): Change numbers to the range from 160 to 167. (R_SH_FIRST_INVALID_RELOC): Adjust. (R_SH_FIRST_INVALID_RELOC_2, R_SH_LAST_INVALID_RELOC_2): New relocs to fill in the gap.
* Add support for the MIPS32Nick Clifton2000-09-144-18/+65
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