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| author | Jeff Johnston <jjohnstn@redhat.com> | 2006-11-24 18:19:18 +0000 |
|---|---|---|
| committer | Jeff Johnston <jjohnstn@redhat.com> | 2006-11-24 18:19:18 +0000 |
| commit | 406a0e047c1cfa6564b6e04c9e7d57ba75ec9058 (patch) | |
| tree | b3095c97454c160634154fbfb333978386829b91 /libgloss/mips/crt0.S | |
| parent | 124b187f16e39511d8829bb7eed44b2c76a4c59a (diff) | |
| download | cygnal-406a0e047c1cfa6564b6e04c9e7d57ba75ec9058.tar.gz cygnal-406a0e047c1cfa6564b6e04c9e7d57ba75ec9058.tar.bz2 cygnal-406a0e047c1cfa6564b6e04c9e7d57ba75ec9058.zip | |
2006-11-24 Thiemo Seufer <ths@mips.com>
Nigel Stephens <nigel@mips.com>
* mips/crt0.S (_start): Use all available float registers. Don't touch
SR_PE on post-mips2 CPUs, it means soft reset there.
Diffstat (limited to 'libgloss/mips/crt0.S')
| -rw-r--r-- | libgloss/mips/crt0.S | 18 |
1 files changed, 14 insertions, 4 deletions
diff --git a/libgloss/mips/crt0.S b/libgloss/mips/crt0.S index 8810afa6c..651b2a782 100644 --- a/libgloss/mips/crt0.S +++ b/libgloss/mips/crt0.S @@ -65,11 +65,21 @@ _start: nop move s0,$31 #endif -#if !defined(__mips64) || (__mips_fpr==32) -#define STATUS_MASK (SR_CU1|SR_PE) +#if __mips<3 +# define STATUS_MASK (SR_CU1|SR_PE) #else -# For mips3 or mips4, turn on 64-bit addressing and additional float regs -#define STATUS_MASK (SR_CU1|SR_PE|SR_FR|SR_KX|SR_SX|SR_UX) +/* Post-mips2 has no SR_PE bit. */ +# ifdef __mips64 +/* Turn on 64-bit addressing and additional float regs. */ +# define STATUS_MASK (SR_CU1|SR_FR|SR_KX|SR_SX|SR_UX) +# else +# ifdef __mips_fpr=32 +# define STATUS_MASK (SR_CU1) +# else +/* Turn on additional float regs. */ +# define STATUS_MASK (SR_CU1|SR_FR) +# endif +# endif #endif li v0, STATUS_MASK mtc0 v0, C0_SR |