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| author | Nick Clifton <nickc@redhat.com> | 2010-11-11 10:23:38 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2010-11-11 10:23:38 +0000 |
| commit | e678928a68e35f1b36a115636eb23eae8d926386 (patch) | |
| tree | 8913070df5d60f9b1e8d7abb46ba1e52cc1aef6b /include/opcode | |
| parent | 590c505c0ec762ec5e391694440bce0762e73f7a (diff) | |
| download | cygnal-e678928a68e35f1b36a115636eb23eae8d926386.tar.gz cygnal-e678928a68e35f1b36a115636eb23eae8d926386.tar.bz2 cygnal-e678928a68e35f1b36a115636eb23eae8d926386.zip | |
bfd/
* archures.c (bfd_mach_mips_loongson_3a): Defined.
* bfd-in2.h (bfd_mach_mips_loongson_3a): Defined.
* cpu-mips.c (I_loongson_3a): New add.
(arch_info_struct): Add loongson_3a.
* elfxx-mips.c (_bfd_elf_mips_mach): Add loongson_3a.
(mips_set_isa_flags): Add loongson_3a.
(mips_mach_extensions): Add loongson_3a in MIPS64 extensions.
binutils/
* readelf.c (get_machine_flags): Add loongson-3a.
gas/
* config/tc-mips.c (mips_cpu_info_table): Add loongson3a in MIPS 64.
* doc/c-mips.texi (MIPS cpu): Add loongson3a.
include/
* elf/mips.h (E_MIPS_MACH_LS3A): Defined.
* opcode/mips.h (INSN_LOONGSON_3A): Defined.
(CPU_LOONGSON_3A): Defined.
(OPCODE_IS_MEMBER): Add LOONGSON_3A.
opcodes/
* mips-dis.c (mips_arch_choices): Add loongson3a.
* mips-opc.c (IL3A): Defined as INSN_LOONGSON_3A.
(mips_builtin_opcodes): Modify some instructions' membership from
IL2F to IL2F|IL3A, since these instructions are supported by Loongson_3A.
Diffstat (limited to 'include/opcode')
| -rw-r--r-- | include/opcode/ChangeLog | 6 | ||||
| -rw-r--r-- | include/opcode/mips.h | 5 |
2 files changed, 11 insertions, 0 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index d7e7c6268..fa689e599 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,9 @@ +2010-11-11 Mingming Sun <mingm.sun@gmail.com> + + * mips.h (INSN_LOONGSON_3A): Defined. + (CPU_LOONGSON_3A): Defined. + (OPCODE_IS_MEMBER): Add LOONGSON_3A. + 2010-10-09 Matt Rice <ratmice@gmail.com> * cgen.h (CGEN_ATTR, CGEN_ATTR_TYPE): Rename bool attribute to bool_. diff --git a/include/opcode/mips.h b/include/opcode/mips.h index 2fb96720b..8817ce302 100644 --- a/include/opcode/mips.h +++ b/include/opcode/mips.h @@ -594,6 +594,8 @@ static const unsigned int mips_isa_table[] = #define INSN_LOONGSON_2E 0x40000000 /* ST Microelectronics Loongson 2F. */ #define INSN_LOONGSON_2F 0x80000000 +/* Loongson 3A. */ +#define INSN_LOONGSON_3A 0x80000400 /* RMI Xlr instruction */ #define INSN_XLR 0x00000020 @@ -647,6 +649,7 @@ static const unsigned int mips_isa_table[] = #define CPU_SB1 12310201 /* octal 'SB', 01. */ #define CPU_LOONGSON_2E 3001 #define CPU_LOONGSON_2F 3002 +#define CPU_LOONGSON_3A 3003 #define CPU_OCTEON 6501 #define CPU_XLR 887682 /* decimal 'XLR' */ @@ -680,6 +683,8 @@ static const unsigned int mips_isa_table[] = && ((insn)->membership & INSN_LOONGSON_2E) != 0) \ || (cpu == CPU_LOONGSON_2F \ && ((insn)->membership & INSN_LOONGSON_2F) != 0) \ + || (cpu == CPU_LOONGSON_3A \ + && ((insn)->membership & INSN_LOONGSON_3A) != 0) \ || (cpu == CPU_OCTEON \ && ((insn)->membership & INSN_OCTEON) != 0) \ || (cpu == CPU_XLR && ((insn)->membership & INSN_XLR) != 0) \ |