diff options
| author | DJ Delorie <dj@redhat.com> | 2010-07-28 21:58:22 +0000 |
|---|---|---|
| committer | DJ Delorie <dj@redhat.com> | 2010-07-28 21:58:22 +0000 |
| commit | f4b40e3b3edded41df3eb19f9ded05903a454775 (patch) | |
| tree | fc024482525f6ee39aec064f4f4b74f3eb677b06 /include/opcode/tic6x-opcode-table.h | |
| parent | aab56a41cffd0c3cc0551843c4e3a66d53b5fbe4 (diff) | |
| download | cygnal-f4b40e3b3edded41df3eb19f9ded05903a454775.tar.gz cygnal-f4b40e3b3edded41df3eb19f9ded05903a454775.tar.bz2 cygnal-f4b40e3b3edded41df3eb19f9ded05903a454775.zip | |
[sim/rx]
* README.txt: New.
* config.h (CYCLE_ACCURATE, CYCLE_STATS): New.
* configure.in (--enable-cycle-accurate, --enable-cycle-stats):
New. Default to enabled.
* configure: Regenerate.
* cpu.h (regs_type): Add cycle tracking info.
(reset_pipeline_stats): Declare.
(halt_pipeline_stats): Declare.
(pipeline_stats): Declare.
* main.c (done): Call pipeline_stats().
* mem.h (rx_mem_ptr): Moved to here ...
* mem.c (mem_ptr): ... from here. Rename throughout.
(mem_put_byte): Move LEDs to Port A. Add Port B to control cycle
statistics. Move UART to SCI4.
(mem_put_hi): Add TPU 1-2. TPU 1 and 2 count CPU cycles.
* reg.c (init_regs): Set Rt reg to -1 (no reg).
* rx.c: Add cycle counting and statistics throughout.
(rx_get_byte): Optimize for speed.
(decode_opcode): Likewise.
(reset_pipeline_stats): New.
(halt_pipeline_stats): New.
(pipeline_stats): New.
* trace.c (sim_disasm_one): Print cycle count.
[include/opcode]
* rx.h (RX_Opcode_ID): Add nop2 and nop3 for statistics.
Diffstat (limited to 'include/opcode/tic6x-opcode-table.h')
0 files changed, 0 insertions, 0 deletions